Project Info
| Name: | Kumar Sundarrajan | |
| Email: | kumar@fortek.com | |
| Phone: | 5107103235 | |
| Company: | Fourth Technologies, Inc | |
| Address: | 1816 Springdale Road | |
| City, State, Zip: | Cherryhill | |
| Project Name: | Sr. Layout/Mask Designer | |
| Expertise: | Don't Know/Not Sure | |
| Description: | Job Description: Sr. Layout/Mask Designer UPDATE: 10nm and 20nm experience important, please review entire description. Must be onsite in Santa Clara, CA. Potential for OT. Chance for assignment extension or potential conversion. Manager values strong references, if available, please attach to the submittal. Duties include, but not limited to: * work closely & efficiently with circuit designer to plan and implement complex SRAM layout tasks such as: floor-planning, custom layouts, e.g. memory cell, sense amp, decoder, block-level integration and layout verification (LVS, DRC, ERC...etc.) * work independently to prioritize, organize and manage schedules to deliver top quality layout on timely basis Required Skills * intimately familiar with Cadence Virtuoso-XL, Calibre LVS/DRC, Unix environment * able to demonstrate a strong understanding of SRAM related layout skills * good understanding of advance CMOS technology/design rules, i.e. 20nm, 10nm * self-motivated team player with good interpersonal and communication skills Desired Skills * excellent understanding of layout dependent parameters (LDP), DFM and ERC * experiences with 20nm or newer process design rules * experiences with tape-out cycle of microprocessor and/or SRAM developments Amount of Experience Required * 3+ years of related experiences in advance (20nm or newer) process technologies; good grasp of TSMC rules is a big plus Certifications or Licenses Required * Associates Degree or equivalent experience/certifications | |
| Other Info: | Start Date: 08/24/2015 End Date: 12/31/2015 Work Days: 94 | |
| Name: | passed | |
| Date: | August 13, 2015 |